iomcu_pins.h File Reference

IOmcu pin map for the module build: a Waveshare RP2350-CAN (RP2350A, 4 MB flash) with its XL2515 CAN (Controller Area Network) controller. More...

#include "out_bind.h"

Go to the source code of this file.

Macros
#define	IOMCU_BOARD_ID   ((uint16_t)OUTBIND_BOARD_PICO_HEADER)
	Which board this image is built for.
#define	IOMCU_HEARTBEAT_PIN   3
	The safety heartbeat from the panel's PANEL_HEARTBEAT_PIN, by a direct wire: no board carries the retriggerable monostable (docs/Safety.md).
#define	IOMCU_CAN_SPI   spi1
	The CAN controller: the module's XL2515 (MCP2515-compatible) behind a SIT65HVD230 transceiver, on the pins the vendor's driver uses.
#define	IOMCU_CAN_PIN_SCK   10
#define	IOMCU_CAN_PIN_MOSI   11
#define	IOMCU_CAN_PIN_MISO   12
#define	IOMCU_CAN_PIN_CS   9
#define	IOMCU_CAN_PIN_INT   8
#define	IOMCU_CAN_CRYSTAL_HZ   16000000u
#define	IOMCU_CAN_SPI_HZ   10000000u
	The vendor's driver clocks SPI (Serial Peripheral Interface) at 10 MHz; the part is rated to 10MHz.
#define	IOMCU_CAN_BITRATE   1000000u
	The bit rate both ends must agree on.
#define	IOMCU_RESERVED_PINS
	The pins no output may be bound to, one bit per pin, handed to the output bank at boot.

Detailed Description

IOmcu pin map for the module build: a Waveshare RP2350-CAN (RP2350A, 4 MB flash) with its XL2515 CAN (Controller Area Network) controller.

The final board is an RP2350B; this map moves with it.

The constraint on the map is silicon: a PIO (programmable input/output) block sees 32 pins with a base of 0 or 16 only, for all four of its state machines, changeable only while the block holds no program. One block cannot serve a pin below 16 and one above 31 at the same time, so the map is partitioned by block before a schematic is drawn.

Only the CAN controller and the safety line are assigned. Every output pin arrives from the panel over the OUTPUTS page instead, because which lead is on which pin is a property of the bench in front of the operator rather than of the firmware. What is fixed here is the other half of that: the pins an output may never be given.

SPDX-License-Identifier: MIT

Macro Definition Documentation

IOMCU_BOARD_ID

#define IOMCU_BOARD_ID   ((uint16_t)OUTBIND_BOARD_PICO_HEADER)

Which board this image is built for.

It is a build-time fact, not a runtime one: the pin map below is compiled in, so an image knows what it is and says so on the identity page. The panel reads it and shows that board's pins and no other. A second board appends an entry to k_boards in shared/outputs/out_bind.c and builds with its own copy of this header.

IOMCU_CAN_BITRATE

#define IOMCU_CAN_BITRATE   1000000u

The bit rate both ends must agree on.

1Mbit/s is what the 16MHz crystal reaches exactly; docs/Link.md has the bus budget at that rate.

IOMCU_CAN_CRYSTAL_HZ

#define IOMCU_CAN_CRYSTAL_HZ   16000000u

the XL2515's crystal, Hz

IOMCU_CAN_PIN_INT

#define IOMCU_CAN_PIN_INT   8

active low, wants a pull-up

IOMCU_CAN_SPI

#define IOMCU_CAN_SPI   spi1

The CAN controller: the module's XL2515 (MCP2515-compatible) behind a SIT65HVD230 transceiver, on the pins the vendor's driver uses.

They do not collide with the safety line on GP3.

The crystal is 16MHz, and the bandwidth budget rests on it: the part halves its crystal before the prescaler and a bit needs 8 quanta, so an 8MHz crystal caps the bus at 500kbit/s. The vendor's driver carries CNF triples for ten standard rates, and each decodes to its advertised rate at 16MHz and at no other crystal; test_can_timing pins it.

IOMCU_HEARTBEAT_PIN

#define IOMCU_HEARTBEAT_PIN   3

The safety heartbeat from the panel's PANEL_HEARTBEAT_PIN, by a direct wire: no board carries the retriggerable monostable (docs/Safety.md).

An input here: the IOmcu gates its own outputs from it and checks the period in firmware, because noise can fake a heartbeat.

IOMCU_RESERVED_PINS

#define IOMCU_RESERVED_PINS

Value:

((1ull << IOMCU_HEARTBEAT_PIN)              \
 | (1ull << IOMCU_CAN_PIN_SCK)              \
 | (1ull << IOMCU_CAN_PIN_MOSI)             \
 | (1ull << IOMCU_CAN_PIN_MISO)             \
 | (1ull << IOMCU_CAN_PIN_CS)               \
 | (1ull << IOMCU_CAN_PIN_INT))

The pins no output may be bound to, one bit per pin, handed to the output bank at boot.

The pin in an OUTPUTS-page slot is whatever an operator typed into the panel's settings, so something has to hold the list of pins that are already spoken for. Getting this wrong is quiet: an output on GP3 drives the safety line from inside, and the interlock stops meaning anything with nothing on any screen to say so.