The state of one KST port: the hardware, the session, the staged registers and the running or last operation. More...

#include <kst_port.h>

Data Fields
kst_port_hw_t	hw
kst_session_t	session
kst_image_t	work
uint16_t	staged [LINK_KS_W_STAGED]
uint16_t	last_cmd [LINK_KS_W_CMD_FRAME]
uint32_t	t0_ms
uint32_t	t1_ms
uint16_t	seq
uint16_t	frames
uint16_t	supply_mv
uint16_t	supply_ma
uint16_t	want_mv
uint16_t	want_ma
uint16_t	back_mv
uint16_t	back_ma
uint16_t	leave_ms
uint16_t	wait_ms
uint8_t	state
uint8_t	port
uint8_t	pin
uint8_t	op
uint8_t	result
uint8_t	refusal
uint8_t	fail_reg
uint8_t	steps_done
uint8_t	seen_step
uint8_t	busy
uint8_t	running
uint8_t	leaving
uint8_t	framed
uint8_t	must_read
uint8_t	view
uint8_t	safe
uint8_t	armed
uint8_t	other
uint8_t	has_pin
uint8_t	sup
uint8_t	on_here
uint8_t	watch
uint8_t	again
uint8_t	from_pwm

Detailed Description

The state of one KST port: the hardware, the session, the staged registers and the running or last operation.

Field Documentation

◆ again

uint8_t kst_port_t::again

RAIL_OFF switches the supply on afterwards

◆ armed

uint8_t kst_port_t::armed

the bank is armed: no ENTER is taken

◆ back_ma

uint16_t kst_port_t::back_ma

the current RAIL_WAIT switches on at, mA

◆ back_mv

uint16_t kst_port_t::back_mv

what RAIL_WAIT switches on at

◆ busy

uint8_t kst_port_t::busy

an operation runs

◆ fail_reg

uint8_t kst_port_t::fail_reg

the register the last operation failed on

◆ framed

uint8_t kst_port_t::framed

a frame went out since the servo had no power

◆ frames

uint16_t kst_port_t::frames

frames the port sent

◆ from_pwm

uint8_t kst_port_t::from_pwm

the cycle started in PWM

◆ has_pin

uint8_t kst_port_t::has_pin

the pin is the wire driver's

◆ last_cmd

uint16_t kst_port_t::last_cmd[LINK_KS_W_CMD_FRAME]

the last command frame

◆ leave_ms

uint16_t kst_port_t::leave_ms

staged: how long the next LEAVE waits

◆ leaving

uint8_t kst_port_t::leaving

why PROGRAMMING ends when the session has

◆ must_read

uint8_t kst_port_t::must_read

whether the registers must be read again

◆ on_here

uint8_t kst_port_t::on_here

this ENTER switched the supply on

◆ op

uint8_t kst_port_t::op

link_kst_op_t of the last operation started

◆ other

uint8_t kst_port_t::other

ports the HITEC page holds

◆ pin

uint8_t kst_port_t::pin

the port's GPIO

◆ port

uint8_t kst_port_t::port

the programming port

◆ refusal

uint8_t kst_port_t::refusal

link_kst_refusal_t of the last command

◆ result

uint8_t kst_port_t::result

kst_ses_t of that operation, or a LINK_KST_RESULT_*

◆ running

uint8_t kst_port_t::running

it is the session's

◆ safe

uint8_t kst_port_t::safe

0 while the bench is not SAFE

◆ seen_step

uint8_t kst_port_t::seen_step

the step last seen

◆ seq

uint16_t kst_port_t::seq

sequence number of the last operation

◆ staged

uint16_t kst_port_t::staged[LINK_KS_W_STAGED]

the registers staged for the next command

◆ state

uint8_t kst_port_t::state

link_kst_state_t

◆ steps_done

uint8_t kst_port_t::steps_done

steps of the operation done

◆ sup

uint8_t kst_port_t::sup

where the wait for the supply is

◆ supply_ma

uint16_t kst_port_t::supply_ma

staged: the current limit of the next ENTER, mA

◆ supply_mv

uint16_t kst_port_t::supply_mv

staged: what the next ENTER asks

◆ t0_ms

uint32_t kst_port_t::t0_ms

bench time of the operation's start, ms

◆ t1_ms

uint32_t kst_port_t::t1_ms

bench time of its end, ms

◆ view

uint8_t kst_port_t::view

the supply's view of the port

◆ wait_ms

uint16_t kst_port_t::wait_ms

how long the running LEAVE waits

◆ want_ma

uint16_t kst_port_t::want_ma

the running ENTER's current limit, mA

◆ want_mv

uint16_t kst_port_t::want_mv

what the running ENTER asks

◆ watch

uint8_t kst_port_t::watch

the session started under a supply that was read on

◆ work

kst_image_t kst_port_t::work

the staged image of a command: not on the stack

The documentation for this struct was generated from the following file:

shared/outputs/include/kst_port.h

Data Fields