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rcbench
Servo and ESC test bench: panel, IOmcu and shared C
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#include <can_timing.h>
Data Fields | |
| uint32_t | clock_hz |
| uint16_t | div_min |
| uint16_t | div_max |
| uint16_t | div_step |
| uint8_t | tseg1_min |
| uint8_t | tseg1_max |
| uint8_t | tseg2_min |
| uint8_t | tseg2_max |
| uint8_t | sjw_max |
| uint8_t | tq_min |
| uint8_t | tq_max |
What a particular controller can be asked for.
Segment counts are in time quanta and exclude the sync quantum, which is always one.
| uint32_t can_timing_limits_t::clock_hz |
the clock the prescaler divides
| uint16_t can_timing_limits_t::div_min |
smallest prescaler divisor, as an actual divisor
| uint16_t can_timing_limits_t::div_step |
1, or 2 where the controller doubles internally
| uint8_t can_timing_limits_t::tq_min |
total quanta a bit may have, sync included
| uint8_t can_timing_limits_t::tseg1_min |
propagation + phase 1
| uint8_t can_timing_limits_t::tseg2_min |
phase 2