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out_pwm_map.c File Reference

The RP2350's GPIO-to-PWM fold. More...

#include "out_pwm_map.h"

Functions

uint8_t out_pwm_slice_of (uint8_t pin)
 The slice pin is wired to, or OUT_PWM_NONE.
uint8_t out_pwm_channel_of (uint8_t pin)
 Which of that slice's channels: 0 is A, 1 is B.
bool out_pwm_same_slice (uint8_t a, uint8_t b)
 Whether two GPIOs count against one wrap register.
bool out_pwm_same_compare (uint8_t a, uint8_t b)
 Whether two GPIOs are driven from one compare register.
uint16_t out_pwm_pulse_max (uint16_t rate_hz)
 The longest pulse a frame of rate_hz carries, in microseconds: the frame's last count, one less than its period.

Detailed Description

The RP2350's GPIO-to-PWM fold.

See out_pwm_map.h.

SPDX-License-Identifier: MIT

Function Documentation

◆ out_pwm_channel_of()

uint8_t out_pwm_channel_of ( uint8_t pin)

Which of that slice's channels: 0 is A, 1 is B.

OUT_PWM_NONE for a pin outside OUT_PWM_GPIOS.

Parameters
pinGPIO number, 0 to OUT_PWM_GPIOS - 1 (47).
Returns
Channel index, 0 or 1. OUT_PWM_NONE for a pin of 48 or more.

◆ out_pwm_pulse_max()

uint16_t out_pwm_pulse_max ( uint16_t rate_hz)

The longest pulse a frame of rate_hz carries, in microseconds: the frame's last count, one less than its period.

0 for a rate of 0 and for a period the sixteen-bit counter cannot hold (below 16Hz).

A pin is high while the counter is below the compare value, so a pulse of this length leaves one count of low at the end of each frame. One count more never goes low: the pin sits high, which is no pulse at all. This is the rule the output pages refuse an endpoint by, and the wrap firmware/iomcu/src/out_pwm.c programs, so the two cannot disagree.

1784us at 560Hz, 1999us at 500Hz, 2499us at 400Hz and 19999us at 50Hz.

Parameters
rate_hzFrame rate in Hz. The counter tick is OUT_PWM_TICK_HZ.
Returns
Longest pulse in microseconds. 0 for a rate of 0 and for a period above 65536 counts.

◆ out_pwm_same_compare()

bool out_pwm_same_compare ( uint8_t a,
uint8_t b )

Whether two GPIOs are driven from one compare register.

True for a pin against itself, and for the folded pairs – GP0 and GP16, GP32 and GP40. Two such pins cannot carry different pulse widths at all, so a driver that has one of them must refuse the other rather than bind both. False when either pin is outside OUT_PWM_GPIOS.

Parameters
aFirst GPIO number.
bSecond GPIO number.
Returns
true when both pins are in range and fold to one slice and one channel, false otherwise.

◆ out_pwm_same_slice()

bool out_pwm_same_slice ( uint8_t a,
uint8_t b )

Whether two GPIOs count against one wrap register.

True for the two channels of a slice, which can carry different pulse widths but not different frame rates. False when either pin is outside OUT_PWM_GPIOS: a pin the fold does not reach shares nothing.

Parameters
aFirst GPIO number.
bSecond GPIO number.
Returns
true when both pins are in range and fold to one slice, false otherwise.

◆ out_pwm_slice_of()

uint8_t out_pwm_slice_of ( uint8_t pin)

The slice pin is wired to, or OUT_PWM_NONE.

Parameters
pinGPIO number, 0 to OUT_PWM_GPIOS - 1 (47).
Returns
Slice index, 0 to 11. OUT_PWM_NONE for a pin of 48 or more.