mcp2515.h

/*
 * The MCP2515's register map and frame layout, from the datasheet.
 *
 * Everything here is arithmetic or a constant: no SPI (Serial Peripheral
 * Interface), no pins, no delays.  It is host-tested, and the driver that
 * touches hardware stays thin.
 *
 * The identifier is the part that needs the tests.  A 29-bit extended
 * identifier is spread across four registers with a three-bit gap in the
 * second: the register layout is the 11-bit one, with the extended bits
 * fitted around it.  A wrong packing puts the frame on the bus under a
 * different identifier, and on a bus that arbitrates by identifier the wrong
 * frame wins.
 *
 * SPDX-License-Identifier: MIT
 */
 
#ifndef RCBENCH_MCP2515_H
#define RCBENCH_MCP2515_H
 
#include <stdbool.h>
#include <stdint.h>
 
#include "link_can.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* SPI commands. */
#define MCP2515_CMD_RESET       0xC0u
#define MCP2515_CMD_READ        0x03u
#define MCP2515_CMD_WRITE       0x02u
#define MCP2515_CMD_RTS_TXB0    0x81u
#define MCP2515_CMD_READ_STATUS 0xA0u
#define MCP2515_CMD_RX_STATUS   0xB0u
#define MCP2515_CMD_BIT_MODIFY  0x05u
 
/* Registers this driver touches. */
#define MCP2515_CANSTAT   0x0Eu
#define MCP2515_CANCTRL   0x0Fu
#define MCP2515_CANINTE   0x2Bu
#define MCP2515_CANINTF   0x2Cu
#define MCP2515_EFLG      0x2Du
#define MCP2515_TEC       0x1Cu
#define MCP2515_REC       0x1Du
 
#define MCP2515_TXB0CTRL  0x30u
#define MCP2515_TXB0SIDH  0x31u   
#define MCP2515_RXB0CTRL  0x60u
#define MCP2515_RXB0SIDH  0x61u
#define MCP2515_RXB1CTRL  0x70u
#define MCP2515_RXB1SIDH  0x71u
#define MCP2515_RXM0SIDH  0x20u
#define MCP2515_RXF0SIDH  0x00u
 
/* CANCTRL request modes, in the top three bits. */
#define MCP2515_MODE_NORMAL   0x00u
#define MCP2515_MODE_SLEEP    0x20u
#define MCP2515_MODE_LOOPBACK 0x40u
#define MCP2515_MODE_LISTEN   0x60u
#define MCP2515_MODE_CONFIG   0x80u
#define MCP2515_MODE_MASK     0xE0u
 
/* CANINTF bits worth naming. */
#define MCP2515_INTF_RX0  0x01u
#define MCP2515_INTF_RX1  0x02u
#define MCP2515_INTF_TX0  0x04u
#define MCP2515_INTF_ERR  0x20u
 
/* EFLG.  The two overflow bits are set when a frame arrives with both receive
 * buffers full; they are sticky and the MCU (microcontroller unit) clears
 * them.  They are the record of a frame lost with nothing wrong on the
 * wire. */
#define MCP2515_EFLG_RX0OVR 0x40u
#define MCP2515_EFLG_RX1OVR 0x80u
#define MCP2515_EFLG_TXBO   0x20u
#define MCP2515_EFLG_OVR    (MCP2515_EFLG_RX0OVR | MCP2515_EFLG_RX1OVR)
 
/* RXB0CTRL / RXB1CTRL receive-mode field. */
#define MCP2515_RXM_ANY      0x60u  
#define MCP2515_RXM_EXT_ONLY 0x40u  
#define MCP2515_BUKT         0x04u

#define MCP2515_SIDL_EXIDE 0x08u

bool mcp2515_pack_id(uint32_t id, uint8_t out[4]);

bool mcp2515_unpack_id(const uint8_t in[4], uint32_t *id);

#define MCP2515_RX_BUFFERS 2u

typedef bool (*mcp2515_fetch_fn)(void *ctx, uint8_t buf[13]);

bool mcp2515_decode_rx(const uint8_t buf[13], link_can_frame_t *f);

bool mcp2515_recv_next(mcp2515_fetch_fn fetch, void *ctx, link_can_frame_t *f,
                       uint32_t *refused);
 
#ifdef __cplusplus
}
#endif
 
#endif /* RCBENCH_MCP2515_H */