rcbench/api/sense__i2c_8h_source.html

#ifndef RCBENCH_SENSE_I2C_H

#define RCBENCH_SENSE_I2C_H


#include <stdbool.h>

#include <stddef.h>

#include <stdint.h>


#include "sense_bus.h"


#define SENSE_I2C_HZ          400000u

#define SENSE_I2C_TIMEOUT_US    1000u

#define SENSE_I2C_IDLE_US         10u

#define SENSE_I2C_PROBE_US        50u

#define SENSE_I2C_CLEAR_HALF_US    5u

#define SENSE_I2C_CLEAR_STRETCH_US 100u


bool sense_i2c_open(uint8_t sda, uint8_t scl);


void sense_i2c_close(void);


sense_err_t sense_i2c_read(void *ctx, uint8_t addr, uint8_t reg,

                           uint8_t *buf, size_t n);


sense_err_t sense_i2c_write(void *ctx, uint8_t addr, uint8_t reg,

                            const uint8_t *buf, size_t n);


sense_err_t sense_i2c_ask(uint8_t addr);


void sense_i2c_recover(void);


#endif /* RCBENCH_SENSE_I2C_H */

sense_bus.h
The sensor bus: one I2C (Inter-Integrated Circuit) bus with current monitors on it,...

sense_err_t
sense_err_t
What a transaction came to.
Definition sense_bus.h:62

sense_i2c_recover
void sense_i2c_recover(void)
The bus clear: the block reset, SCL clocked 9 times as an open-drain GPIO, so a part that was sending...
Definition sense_i2c.c:271

sense_i2c_write
sense_err_t sense_i2c_write(void *ctx, uint8_t addr, uint8_t reg, const uint8_t *buf, size_t n)
sense_i2c_t's write: the register pointer and n bytes.
Definition sense_i2c.c:204

sense_i2c_open
bool sense_i2c_open(uint8_t sda, uint8_t scl)
The block on sda and scl.
Definition sense_i2c.c:61

sense_i2c_close
void sense_i2c_close(void)
The block reset and its pins back to plain inputs, pulled down as at reset.
Definition sense_i2c.c:94

sense_i2c_read
sense_err_t sense_i2c_read(void *ctx, uint8_t addr, uint8_t reg, uint8_t *buf, size_t n)
sense_i2c_t's read: the register pointer, a repeated START and n bytes, most significant first.
Definition sense_i2c.c:181

sense_i2c_ask
sense_err_t sense_i2c_ask(uint8_t addr)
Whether addr acknowledges: the address and one byte read.
Definition sense_i2c.c:228