reset_cause.h

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#ifndef RCBENCH_RESET_CAUSE_H
#define RCBENCH_RESET_CAUSE_H
 
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* POWMAN CHIP_RESET: the source of the last chip-level reset. */
#define RESET_CHIP_HAD_POR                  0x00010000u 
#define RESET_CHIP_HAD_BOR                  0x00020000u 
#define RESET_CHIP_HAD_RUN_LOW              0x00040000u 
#define RESET_CHIP_HAD_DP_RESET_REQ         0x00080000u 
#define RESET_CHIP_HAD_RESCUE               0x00200000u 
#define RESET_CHIP_HAD_WATCHDOG_RESET_POWMAN_ASYNC 0x00400000u 
#define RESET_CHIP_HAD_WATCHDOG_RESET_POWMAN 0x00800000u 
#define RESET_CHIP_HAD_WATCHDOG_RESET_SWCORE 0x01000000u 
#define RESET_CHIP_HAD_SWCORE_PD            0x02000000u 
#define RESET_CHIP_HAD_GLITCH_DETECT        0x04000000u 
#define RESET_CHIP_HAD_HZD_SYS_RESET_REQ    0x08000000u 
#define RESET_CHIP_HAD_WATCHDOG_RESET_PSM   0x10000000u 

#define RESET_CHIP_HAD_WATCHDOG_ANY                                         \
    (RESET_CHIP_HAD_WATCHDOG_RESET_POWMAN_ASYNC                             \
     | RESET_CHIP_HAD_WATCHDOG_RESET_POWMAN                                 \
     | RESET_CHIP_HAD_WATCHDOG_RESET_SWCORE                                 \
     | RESET_CHIP_HAD_WATCHDOG_RESET_PSM)
 
/* WATCHDOG REASON: both bits zero after a reset that was not the watchdog. */
#define RESET_WD_REASON_TIMER 0x1u 
#define RESET_WD_REASON_FORCE 0x2u 
 
/* The boot type, byte 1 of the boot ROM's boot word (0xttppbbdd). */
#define RESET_BOOT_TYPE_NORMAL       0x00u 
#define RESET_BOOT_TYPE_BOOTSEL      0x02u 
#define RESET_BOOT_TYPE_RAM_IMAGE    0x03u 
#define RESET_BOOT_TYPE_FLASH_UPDATE 0x04u 
#define RESET_BOOT_TYPE_PC_SP        0x0Du 
#define RESET_BOOT_TYPE_CHAINED_FLAG 0x80u 

#define RESET_PICOTOOL_P0 0xFFFFFFFFu
#define RESET_PICOTOOL_P1 0x00000000u

typedef struct {
    uint32_t chip_reset;       
    uint32_t wd_reason;        
    uint32_t wd_scratch2;      
    uint32_t wd_scratch3;      
    bool     boot_ok;          
    uint32_t boot_word;        
    uint32_t reboot_params[2]; 
} reset_regs_t;

typedef enum {
    RESET_CAUSE_UNKNOWN = 0,   
    RESET_CAUSE_POR,           
    RESET_CAUSE_BOR,           
    RESET_CAUSE_RUN_PIN,       
    RESET_CAUSE_GLITCH,        
    RESET_CAUSE_DEBUGGER,      
    RESET_CAUSE_POWER_DOWN,    
    RESET_CAUSE_FLASH_UPDATE,  
    RESET_CAUSE_RAM_IMAGE,     
    RESET_CAUSE_BOOTSEL_REBOOT, 
    RESET_CAUSE_SW_RESET,      
    RESET_CAUSE_WATCHDOG,      
    RESET_CAUSE_COUNT
} reset_cause_t;

reset_cause_t reset_cause_decode(const reset_regs_t *r);

const char *reset_cause_word(reset_cause_t c);

int reset_cause_boot_type(const reset_regs_t *r);

size_t reset_cause_full(const reset_regs_t *r, char *out, size_t n);

#define RESET_CAUSE_FULL_MAX 144u
 
#ifdef __cplusplus
}
#endif
 
#endif /* RCBENCH_RESET_CAUSE_H */